The invention relates to an electrical paper capacitor with reduced self-inductance which is built into a housing, a winding of which is disposed on a core tube, and external terminals of which are connected to the electrodes via terminal elements positioned in the inside of the housing.
In such capacitors, the self-inductance is proportional to the layer width. Added thereto is the inductance of the terminal elements from the winding up to the contact plane of the external terminals. Typical values lie between 1 and 3 nH/mm inductance per length unit, whereby standard terminal line lengths are contained in this value range. Given a layer width of about 60 mm, capacitors with a winding, given a standard connection, have a self-inductance of about 100 nH. Structures formed of a plurality of windings interlaced with one another lie considerably above this value.
There are applications, for example given employment as a damping capacitor for GTO thyristors (gate turn-off), where these values of inductance are too high. Damping capacitors are AC capacitors which are connected parallel to semiconductor components and suppress or damp undesired voltage peaks thereacross. For this purpose, an optimally low self-inductance of the damping capacitor is required, particularly given new semiconductor components such as, for example, GTO thyristors.